Prompt Templates for Automated Code Timing & Performance Tests (WCET-aware)

Hook: Stop guessing worst-case timing — turn prompts into repeatable WCET-aware tests

If your team still relies on ad-hoc unit tests or manual instrumentation to estimate latency, you’re losing time and certification confidence. Embedded projects in 2026 demand repeatable, auditable artifacts that feed WCET tools and verification pipelines. This article gives you ready-to-run prompt templates, code snippets and CI patterns to generate unit and integration tests that purposely target worst-case execution paths and produce artifacts consumable by WCET analyzers and test suites like VectorCAST (now expanding timing analysis capabilities after the RocqStat acquisition, Automotive World, Jan 16, 2026).

The 2026 context: Why WCET-aware test generation matters now

The industry shift in late 2025 and early 2026 — tools integrating static timing analyzers with test frameworks — changed expectations. Companies such as Vector Informatik planning to fold StatInf’s RocqStat technology into VectorCAST signal a convergence of timing analysis and software verification. For embedded developers and tool vendors, this means tests aren’t just for correctness anymore: they’re inputs into WCET workflows used for safety cases (ISO 26262, DO-178/DO-330) and real-time guarantees.

Practical implication: your automated tests and test artifacts must include loop bounds, call-graph annotations, input constraints, and calibrated timing measurements. LLMs can accelerate creation of those artifacts if you design prompts that produce structured, machine-readable outputs.

Core concepts to encode in prompts

• WCET vs. average latency — tests must target the maximum feasible path, not typical inputs.
• Loop and recursion bounds — static analyzers require explicit bounds or annotations.
• Call-graph completeness — include stubs or models for hardware interactions (ISRs, peripherals).
• Measurement calibration — specify compiler flags, optimisation levels, and hardware timer resolution.
• Artifact formats — prefer JSON/XML/YAML for automated ingestion by CI and WCET tools.

Prompt engineering principles for WCET-aware test generation

Prompts must set explicit objectives and output schemas. Use a system instruction that enforces deterministic behaviour (temperature 0), and request structured outputs that include test vectors, annotations and rationale for why a vector is worst-case.

1. Set the goal: "Find inputs that maximize execution time for function X."
2. Provide constraints: compiler flags, architecture (ARM Cortex-M4), real-time OS vs bare-metal, and instrumentation method.
3. Request machine-readable artifacts: JSON test vectors, annotated source with // @loop_bound, and a small harness in C that logs cycle counts.
4. Require rationale: ask the model to explain which path is longest and why (control-flow and loop iteration counts).

Ready-made prompt templates (copy, paste, run)

Below are battle-tested prompts, each with the expected structured outputs. Use them with LLMs (temperature 0, max tokens as needed) or integrate into your internal prompt library.

1) Unit test + worst-case input generator (C function)

System prompt (set once):

{
  "role": "system",
  "content": "You are an expert embedded developer and static-timing analyst. Produce deterministic, structured JSON outputs and annotated C test harnesses. Use comments // @loop_bound N when specifying loop bounds." 
}

User prompt (example):

{
  "role": "user",
  "content": "Given the C function below (ARM Cortex-M4, -O2). Generate up to 8 unit tests that maximize execution time. Output must be JSON with keys: tests (array of {name,input,expected_behavior}), annotated_source (C source with @loop_bound comments), harness (a minimal C file that runs each test and logs cycle counts using DWT_CYCCNT), and rationale (explain which path is worst-case).\n\nC code:\n\nunsigned compute(int a, int b) {\n  unsigned result = 0;\n  for (int i = 0; i < a; ++i) {\n    if (b & 1) {\n      result += complex_op(i);\n    } else {\n      result += simple_op(i);\n    }\n  }\n  if (result & 0x1000) {\n    result ^= fallback_op(result);\n  }\n  return result;\n}\n\nHelpers: complex_op is ~50 cycles per call, simple_op ~5 cycles, fallback_op ~120 cycles per call. Assume a max parameter range for a: 0..1000, b: 0..65535."
}

Expected output (excerpt):

{
  "tests": [
    {"name":"max_complex","input":{"a":1000,"b":1},"expected_behavior":"longest path: 1000 calls to complex_op"},
    {"name":"mixed_with_fallback","input":{"a":1000,"b":0x8001},"expected_behavior":"complex_op mostly and fallback_op triggered leading to additional 120 cycles"}
  ],
  "annotated_source": "unsigned compute(int a, int b) {\n  unsigned result = 0;\n  // @loop_bound 1000\n  for (int i = 0; i < a; ++i) { ... }\n}",
  "harness": "#include \n// DWT_CYCCNT-based harness code...",
  "rationale": "max_complex has ~1000*50 cycles => 50,000 cycles plus overhead..."
}

2) Integration test harness generator (peripherals + ISR models)

Use when the worst-case involves interrupts or hardware. Prompt asks model to produce mock ISRs, deterministic peripheral models, and a YAML artifact mapping events to timing scenarios.

{
  "role":"user",
  "content":"Target: firmware main loop that services CAN and timers. Produce: (1) mock ISR C files, (2) integration tests that trigger prioritised interrupts leading to longest latency in 'process_message', (3) YAML scenario file for CI to run each scenario on hardware-in-loop. Include DWT logging and peripheral stubs. Target: Cortex-M7, -O3."
}

3) Loop-bound annotation assistant (for static tools)

Prompt to produce explicit annotations for each loop and recursive call, including justification and worst-case iterations.

{
  "role":"user",
  "content":"Scan the following C file and return the same code with comments // @loop_bound N for each loop and // @rec_bound N for recursion. Provide a table (CSV) of function, loop line, bound, justification. Also produce a short summary of assumptions.\n\n[insert C file]\n"
}

4) Call-graph + WCET estimate generator

Request: produce a call-graph in JSON (nodes: function name, cost_cycles estimate, edges). Useful for feeding into WCET analyzers or for visual tooling.

{
  "role":"user",
  "content":"Provide call-graph JSON for the compiled binaries; include per-function best estimate at -O2 for Cortex-M4. Assume cycle costs for library functions: memcpy 20 cycles per 32 bytes, math ops annotated. Indicate functions needing measurement."
}

Concrete example: from prompt to test artifact

Walkthrough: you have function compute() shown earlier. Use the unit-test prompt above. The model returns JSON and harness. You commit artifacts to repo/tests/wcet and your CI runs a container that builds the harness with cycle-accurate simulator or on-board hardware.

Example harness snippet (generated):

#include "stm32f4xx.h" // or target-specific
void enable_cycle_counter(void) { DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; }
uint32_t now(void) { return DWT->CYCCNT; }

int main(void) {
  enable_cycle_counter();
  uint32_t t0 = now();
  unsigned r = compute(1000, 1);
  uint32_t t1 = now();
  printf("compute cycles=%u\n", t1 - t0);
}

The LLM also outputs test vectors as JSON so your CI can iterate test cases deterministically.

CI pattern: produce WCET artifacts and publish them for analysis

The goal is to generate artifacts that are directly consumable by timing analyzers and verification tools. Minimal CI flow:

1. LLM-run stage: generate annotated source, tests, call-graph JSON, and YAML scenarios.
2. Build stage: compile with deterministic flags and symbol information (e.g., -ffunction-sections -fdata-sections -g -O2).
3. Execution stage: run tests on simulator/HIL, collect cycle logs and trace (ETM or DWT), and save as artifacts.
4. Analysis stage: feed annotations + traces + binary to WCET tool (static or measurement-based) and produce WCET report (XML/JSON).
5. Gate stage: fail PRs if WCET exceeds contract or if new unannotated loops are detected.

Example GitHub Actions snippet (simplified):

name: wcet-tests
on: [push]

jobs:
  generate-and-run:
    runs-on: ubuntu-latest
    steps:
      - uses: actions/checkout@v4
      - name: Run LLM prompt to generate tests
        run: |
          python tools/run_prompt.py --prompt templates/wcet_unit_test.json --out repo/tests/wcet
      - name: Build firmware
        run: make CROSS_COMPILE=arm-none-eabi- TARGET=stm32f4
      - name: Run on QEMU
        run: qemu-system-arm -M stm32-pov -kernel build/firmware.elf --trace-cycles > artifact/cycles.log
      - name: Upload artifacts
        uses: actions/upload-artifact@v4
        with:
          name: wcet-results
          path: artifact/

Artifact formats that WCET tools want

When designing prompts, aim for these outputs so your toolchain plugs in smoothly:

• Annotated source — comments like // @loop_bound N, // @assume input_range=(0,1000)
• Test vectors — JSON array: {name, inputs, expected, tags:[wcet,regression]}
• Call-graph — JSON nodes/edges with cost estimates
• Scenario YAML — sequences of events for integration tests
• Timing traces — raw cycle logs, ETM traces, or summarized CSV (timestamp,pc)
• WCET report — XML/JSON from static tool or measurement aggregator to anchor the safety case

Validation: how to trust LLM-generated tests for safety

LLMs speed up generation but do not replace verification. Add these checks:

• Cross-check annotated loop bounds with static analysis tools (e.g., bound-checkers and K-framework derivatives).
• Instrument generated tests to log path coverage and branch counts. Reject vectors that don’t reach intended paths.
• Measure on hardware multiple times and apply statistical filtering to remove jitter; store all raw traces for audits.
• Human-in-the-loop review for any assumptions about peripheral behavior or environment models used by the prompt.

Advanced strategies and 2026 predictions

Trends in 2026 you should plan for:

• Toolchain convergence: Vendor stacks will merge static timing analyzers with test frameworks — expect first-class support for WCET artifacts in mainstream testing tools (Vector/RocqStat/VectorCAST being a prime example, Automotive World, Jan 16, 2026).
• Model-backed prompts: Combining symbolic execution (KLEE), SMT feedback and LLM prompts will generate provably long execution paths rather than heuristic guesses.
• Multicore and timing interference: Tools will increasingly model shared caches and bus contention; prompts must include interference scenarios and co-scheduling events.
• Certification-focused artifacts: expect regulators to require auditable prompt logs: include prompt text, model version, and deterministic seeds in the artifact bundle for traceability.

"When using LLMs for test generation in safety-critical systems, always record the prompt, model version and deterministic settings as part of the trace bundle. This is becoming a standard artifact for auditability in 2026."

Checklist: integrate LLM-generated WCET tests into your workflow

• Record prompt, model, and temperature in test artifact metadata.
• Produce annotated source with explicit loop/recursion bounds.
• Generate machine-readable test vectors and call-graphs.
• Build deterministic compiler flags and symbol maps into CI.
• Run on representative hardware or validated simulator; collect traces.
• Feed artifacts into your WCET tool and save the resulting report in the PR comment or release bundle.

Example prompt pack — copyable for internal prompt libraries

{
  "meta": {"purpose":"wcet-test-gen","target":"Cortex-M4","model_temp":0.0},
  "system": "Expert: embedded timing analyst. Output JSON + annotated C. Always include 'prompt_id' and 'model_version' in output metadata.",
  "user": "Input: [C FILE]. Output: {tests, annotated_source, harness, call_graph, rationale}. Each test: name, inputs, expected, wcet_estimate_cycles. Add // @loop_bound comments. Assume hardware: Cortex-M4, 168MHz. Compiler flags: -O2 -ffunction-sections -fdata-sections." 
}

Final takeaways

In 2026, WCET-aware testing is a first-class engineering activity. Use LLMs to generate structured, auditable artifacts — not only unit tests but the annotations, harnesses, and metadata that timing analyzers need. Keep human oversight for assumptions and record everything for certification and reproducibility.

Call to action

Ready to deploy these templates? Download our prompt pack and CI examples, or book a consult to adapt templates to your target architecture (ARM, RISC-V, or custom). If you publish developer tooling, we can help design schema mappings to VectorCAST and other WCET analyzers so your customers get end-to-end timing verification out of the box.

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